Intel unveiled yesterday what is required as the largest FPGA in the world: the Stratix 10 GX 10M. Engraved in 14 nm, this programmable circuit embodies the trifling of 43.3 billion transistors and 10.2 million logical cells. What's behind the Virtex UltraScale + VU19P and its 35 billion transistors. Announced in August by the American Xilinx, the latter was limited to "only" 9 million logical cells and was based on a 16 nm engraving.
In the game of the one who will release the biggest FPGA, Intel has just put a bellows to his competitor Xilinx. With its Stratix 10 GX 10M, the Santa Clara group uses its EMIB ( Embedded Multi-die Interconnect Bridge) system) to assemble two large FPGA dies and four transceiver chiplets on a single circuit. This technology was used by Intel for its Kaby Lake-G chips. Abandoned by the blues in October, they coupled, as a reminder, an Intel processor to an AMD Radeon RX Vega iGPU, all sprinkled with HMB2 video memory.
This method of assembling different components on a single circuit allows Intel to equip its FPGA with 10.2 million logical cells and 2 304 I / O ports. That's almost four times more than the Stratix 10 GX 2800 (2.75 million logical cells and 1,160 I / O connections on the meter), the former Intel FPGA. But just ... what is an FPGA?
An FPGA, what is it and who is it for?
Xilinx gives us, on its official website, a good definition of what is an FPGA ( Field Programmable Gate Arrays ). They are in fact semiconductors articulated around a matrix of configurable logic blocks (CLBs), linked to each other by programmable interconnections.
The main advantage of an FPGA circuit is that it can be programmed according to a particular application or feature, and this after leaving the factory. This flexibility, Xilinx explains, makes it possible, for example, to distinguish between FPGAs and Application Specific Integrated Circuits (ASICs ), which are designed for specific tasks ... and can not be reconfigured.
The evolutionary nature of FPGAs makes them particularly useful in advanced sectors, such as aerospace, defense, automotive, servers, and telecommunications.
Intel buries Stratix 10 GX 2800, its old FPGA model
But let's go back to the announcement. To better demonstrate the technological advancement offered by its Stratix 10 GX 10M, Intel has compared its new FPGA to no less than four Stratix 10 GX 2800. What illustrates a colossal reduction of 40% consumption, and capacity and equivalent frequencies.
As Tom's Hardware says, Intel is using Xilinx differently to connect the dies of its new product. Instead of counting, like its competitor, on an interposer, the group uses (and we mentioned it above) its EMIB 2.5D technology, which allows a copious bandwidth between the two dies that make up the Stratix 10 GX 10M. Intel thus evokes a bus with a maximum of 25 920 connections, each with a bit rate of 2 Gb / s. The inter-dies bandwidth thus reaches a threshold of 6.5 TB / s.
43.3 billion transistors: an estimate ... à la ladle
Very proud to mention the 43.3 billion transistors populating its new circuit, Intel is still careful to specify that this is an estimate based on the size of the dies Stratix 10 GX 10M and on their density. Each of these dies thus measures nearly 1400 mm², for a density estimated at plus or minus 31MTr / mm².
We have here the biggest logical circuit of the market ... And it is engraved only at 14 nm. Even the Xilinx Versal range (engraved in 7 nm) is currently limited to 37 billion transistors. While at NVIDIA the V100 contains 21.2 billion transistors on a die of 815 mm², says Tom's Hardware.
There remains the question of launching this Stratix 10 GX 10M. On this point, Intel refers to marketing in a few months for its new FPGA, without being much more specific.
Source: Tom's Hardware
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